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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/journals/dt/GuilleyFHPM07>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Florent_Flament>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Philippe_Hoogvorst>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Renaud_Pacalet>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Sylvain_Guilley>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Yves_Mathieu>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FMDT.2007.202>
foaf:homepage <https://doi.org/10.1109/MDT.2007.202>
dc:identifier DBLP journals/dt/GuilleyFHPM07 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FMDT.2007.202 (xsd:string)
dcterms:issued 2007 (xsd:gYear)
swrc:journal <https://dblp.l3s.de/d2r/resource/journals/dt>
rdfs:label Secured CAD Back-End Flow for Power-Analysis-Resistant Cryptoprocessors. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Florent_Flament>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Philippe_Hoogvorst>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Renaud_Pacalet>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Sylvain_Guilley>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Yves_Mathieu>
swrc:number 6 (xsd:string)
swrc:pages 546-555 (xsd:string)
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/journals/dt/GuilleyFHPM07/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/journals/dt/GuilleyFHPM07>
rdfs:seeAlso <http://dblp.uni-trier.de/db/journals/dt/dt24.html#GuilleyFHPM07>
rdfs:seeAlso <https://doi.org/10.1109/MDT.2007.202>
dc:subject robust hardware, back-end design automation, power-constant architectures, side-channel attacks, mitigation, DFM, DFY (xsd:string)
dc:title Secured CAD Back-End Flow for Power-Analysis-Resistant Cryptoprocessors. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:Article
rdf:type foaf:Document
swrc:volume 24 (xsd:string)