Using VHDL for Board Level Simulation.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/journals/dt/HabincS96
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dcterms:
bibliographicCitation
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http://dblp.uni-trier.de/rec/bibtex/journals/dt/HabincS96
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dc:
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https://dblp.l3s.de/d2r/resource/authors/Peter_Sinander
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dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Sandi_Habinc
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foaf:
homepage
<
http://dx.doi.org/doi.org%2F10.1109%2F54.536097
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issued
1996
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Using VHDL for Board Level Simulation.
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https://dblp.l3s.de/d2r/resource/authors/Sandi_Habinc
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swrc:
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3
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swrc:
pages
66-78
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rdfs:
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rdfs:
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title
Using VHDL for Board Level Simulation.
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