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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/journals/dt/PandeGISM05>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Andr%E2%88%9A%C2%A9_Ivanov>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Cristian_Grecu>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Giovanni_De_Micheli>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Partha_Pratim_Pande>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Resve_A._Saleh>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FMDT.2005.108>
foaf:homepage <https://doi.org/10.1109/MDT.2005.108>
dc:identifier DBLP journals/dt/PandeGISM05 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FMDT.2005.108 (xsd:string)
dcterms:issued 2005 (xsd:gYear)
swrc:journal <https://dblp.l3s.de/d2r/resource/journals/dt>
rdfs:label Design, Synthesis, and Test of Networks on Chips. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Andr%E2%88%9A%C2%A9_Ivanov>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Cristian_Grecu>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Giovanni_De_Micheli>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Partha_Pratim_Pande>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Resve_A._Saleh>
swrc:number 5 (xsd:string)
swrc:pages 404-413 (xsd:string)
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/journals/dt/PandeGISM05/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/journals/dt/PandeGISM05>
rdfs:seeAlso <http://dblp.uni-trier.de/db/journals/dt/dt22.html#PandeGISM05>
rdfs:seeAlso <https://doi.org/10.1109/MDT.2005.108>
dc:subject VLSI, VLSI Systems, Automatic synthesis, Reliability, Testing, and Fault-Tolerance (xsd:string)
dc:title Design, Synthesis, and Test of Networks on Chips. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:Article
rdf:type foaf:Document
swrc:volume 22 (xsd:string)