An Implementation Approach of the IEEE 1149.1 for the Routing Test of a VLSI Massively Parallel Architecture.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/journals/et/AktoufRMM98
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1998
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An Implementation Approach of the IEEE 1149.1 for the Routing Test of a VLSI Massively Parallel Architecture.
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3
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171-185
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MIMD architectures; routing test; IEEE 1149.1; built-in self-test; diagnosis
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An Implementation Approach of the IEEE 1149.1 for the Routing Test of a VLSI Massively Parallel Architecture.
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