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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/journals/et/Bose04>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Soumitra_Bose>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1007%2Fs10677-004-4248-y>
foaf:homepage <https://doi.org/10.1007/s10677-004-4248-y>
dc:identifier DBLP journals/et/Bose04 (xsd:string)
dc:identifier DOI doi.org%2F10.1007%2Fs10677-004-4248-y (xsd:string)
dcterms:issued 2004 (xsd:gYear)
swrc:journal <https://dblp.l3s.de/d2r/resource/journals/et>
rdfs:label Modeling Custom Digital Circuits for Test. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Soumitra_Bose>
swrc:number 6 (xsd:string)
swrc:pages 591-609 (xsd:string)
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/journals/et/Bose04/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/journals/et/Bose04>
rdfs:seeAlso <http://dblp.uni-trier.de/db/journals/et/et20.html#Bose04>
rdfs:seeAlso <https://doi.org/10.1007/s10677-004-4248-y>
dc:subject switch-level modeling; logic simulation; fault simulation; ATPG (xsd:string)
dc:title Modeling Custom Digital Circuits for Test. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:Article
rdf:type foaf:Document
swrc:volume 20 (xsd:string)