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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/journals/et/DeyC95>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Srimat_T._Chakradhar>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Sujit_Dey>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1007%2FBF00993318>
foaf:homepage <https://doi.org/10.1007/BF00993318>
dc:identifier DBLP journals/et/DeyC95 (xsd:string)
dc:identifier DOI doi.org%2F10.1007%2FBF00993318 (xsd:string)
dcterms:issued 1995 (xsd:gYear)
swrc:journal <https://dblp.l3s.de/d2r/resource/journals/et>
rdfs:label Design of testable sequential circuits by repositioning flip-flops. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Srimat_T._Chakradhar>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Sujit_Dey>
swrc:number 1-2 (xsd:string)
swrc:pages 105-114 (xsd:string)
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/journals/et/DeyC95/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/journals/et/DeyC95>
rdfs:seeAlso <http://dblp.uni-trier.de/db/journals/et/et7.html#DeyC95>
rdfs:seeAlso <https://doi.org/10.1007/BF00993318>
dc:subject design for testability; partial scan; retiming; cycle-breaking; flip-flop minimization; redundant fault; sequential redundancy; strongly connected components; sequential circuits (xsd:string)
dc:title Design of testable sequential circuits by repositioning flip-flops. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:Article
rdf:type foaf:Document
swrc:volume 7 (xsd:string)