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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/journals/et/GoelM03>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Erik_Jan_Marinissen>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Sandeep_Kumar_Goel>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1023%2FA%3A1024644026761>
foaf:homepage <https://doi.org/10.1023/A:1024644026761>
dc:identifier DBLP journals/et/GoelM03 (xsd:string)
dc:identifier DOI doi.org%2F10.1023%2FA%3A1024644026761 (xsd:string)
dcterms:issued 2003 (xsd:gYear)
swrc:journal <https://dblp.l3s.de/d2r/resource/journals/et>
rdfs:label A Test Time Reduction Algorithm for Test Architecture Design for Core-Based System Chips. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Erik_Jan_Marinissen>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Sandeep_Kumar_Goel>
swrc:number 4 (xsd:string)
swrc:pages 425-435 (xsd:string)
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/journals/et/GoelM03/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/journals/et/GoelM03>
rdfs:seeAlso <http://dblp.uni-trier.de/db/journals/et/et19.html#GoelM03>
rdfs:seeAlso <https://doi.org/10.1023/A:1024644026761>
dc:subject SOC-test; TAM and wrapper design; test scheduling (xsd:string)
dc:title A Test Time Reduction Algorithm for Test Architecture Design for Core-Based System Chips. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:Article
rdf:type foaf:Document
swrc:volume 19 (xsd:string)