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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/journals/et/GoelV03>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Bart_Vermeulen>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Sandeep_Kumar_Goel>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1023%2FA%3A1024639925852>
foaf:homepage <https://doi.org/10.1023/A:1024639925852>
dc:identifier DBLP journals/et/GoelV03 (xsd:string)
dc:identifier DOI doi.org%2F10.1023%2FA%3A1024639925852 (xsd:string)
dcterms:issued 2003 (xsd:gYear)
swrc:journal <https://dblp.l3s.de/d2r/resource/journals/et>
rdfs:label Data Invalidation Analysis for Scan-Based Debug on Multiple-Clock System Chips. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Bart_Vermeulen>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Sandeep_Kumar_Goel>
swrc:number 4 (xsd:string)
swrc:pages 407-416 (xsd:string)
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/journals/et/GoelV03/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/journals/et/GoelV03>
rdfs:seeAlso <http://dblp.uni-trier.de/db/journals/et/et19.html#GoelV03>
rdfs:seeAlso <https://doi.org/10.1023/A:1024639925852>
dc:subject scan-based debug; clock gating; Design-for-Debug (DfD); multiple-clock domains; silicon debug (xsd:string)
dc:title Data Invalidation Analysis for Scan-Based Debug on Multiple-Clock System Chips. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:Article
rdf:type foaf:Document
swrc:volume 19 (xsd:string)