HIST: A hierarchical self test methodology for chips, boards, and systems.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/journals/et/HaberlK95
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1995
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HIST: A hierarchical self test methodology for chips, boards, and systems.
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85-106
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Boundary-scan architecture; built-in self test (BIST); hierarchical self test; self test synthesis; system test
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HIST: A hierarchical self test methodology for chips, boards, and systems.
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