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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/journals/et/HayekR99>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Chantal_Robach>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Ghassan_Al_Hayek>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1023%2FA%3A1008317826940>
foaf:homepage <https://doi.org/10.1023/A:1008317826940>
dc:identifier DBLP journals/et/HayekR99 (xsd:string)
dc:identifier DOI doi.org%2F10.1023%2FA%3A1008317826940 (xsd:string)
dcterms:issued 1999 (xsd:gYear)
swrc:journal <https://dblp.l3s.de/d2r/resource/journals/et>
rdfs:label From Design Validation to Hardware Testing: A Unified Approach. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Chantal_Robach>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Ghassan_Al_Hayek>
swrc:number 1-2 (xsd:string)
swrc:pages 133-140 (xsd:string)
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/journals/et/HayekR99/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/journals/et/HayekR99>
rdfs:seeAlso <http://dblp.uni-trier.de/db/journals/et/et14.html#HayekR99>
rdfs:seeAlso <https://doi.org/10.1023/A:1008317826940>
dc:subject design validation; mutation testing; VHDL (xsd:string)
dc:title From Design Validation to Hardware Testing: A Unified Approach. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:Article
rdf:type foaf:Document
swrc:volume 14 (xsd:string)