Fault Modeling and Simulation of Power Supply Voltage Transients in Digital Systems on a Chip.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/journals/et/JuniorRSTVT05
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2005
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Fault Modeling and Simulation of Power Supply Voltage Transients in Digital Systems on a Chip.
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fault tolerance; intermittent faults modeling and simulation; digital SoC; EMI/EMC standard compliance; delay fault simulation; power supply voltage transients
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Fault Modeling and Simulation of Power Supply Voltage Transients in Digital Systems on a Chip.
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