Concurrent Error Detection in a Bit-Parallel Systolic Multiplier for Dual Basis of GF(2m).
Resource URI: https://dblp.l3s.de/d2r/resource/publications/journals/et/LeeCL05
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https://dblp.l3s.de/d2r/resource/authors/Jim-Min_Lin
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2005
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Concurrent Error Detection in a Bit-Parallel Systolic Multiplier for Dual Basis of GF(2m).
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5
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539-549
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finite fields; multiplier; fault-tolerant computing; fault detection; cryptography; single stuck-at fault
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Concurrent Error Detection in a Bit-Parallel Systolic Multiplier for Dual Basis of GF(2m).
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