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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/journals/et/TehranipourFNM04>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/M._R._Movahedin>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Mohammad_H._Tehranipour>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Seid_Mehdi_Fakhraie>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Zainalabedin_Navabi>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1023%2FB%3AJETT.0000023679.08518.bf>
foaf:homepage <https://doi.org/10.1023/B:JETT.0000023679.08518.bf>
dc:identifier DBLP journals/et/TehranipourFNM04 (xsd:string)
dc:identifier DOI doi.org%2F10.1023%2FB%3AJETT.0000023679.08518.bf (xsd:string)
dcterms:issued 2004 (xsd:gYear)
swrc:journal <https://dblp.l3s.de/d2r/resource/journals/et>
rdfs:label A Low-Cost At-Speed BIST Architecture for Embedded Processor and SRAM Cores. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/M._R._Movahedin>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Mohammad_H._Tehranipour>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Seid_Mehdi_Fakhraie>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Zainalabedin_Navabi>
swrc:number 2 (xsd:string)
swrc:pages 155-168 (xsd:string)
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/journals/et/TehranipourFNM04/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/journals/et/TehranipourFNM04>
rdfs:seeAlso <http://dblp.uni-trier.de/db/journals/et/et20.html#TehranipourFNM04>
rdfs:seeAlso <https://doi.org/10.1023/B:JETT.0000023679.08518.bf>
dc:subject BIST architecture; DSP/microprocessor; UTS-DSP; bit/word-oriented memory; memory testing; march test (xsd:string)
dc:title A Low-Cost At-Speed BIST Architecture for Embedded Processor and SRAM Cores. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:Article
rdf:type foaf:Document
swrc:volume 20 (xsd:string)