An Effective Multi-Chip BIST Scheme.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/journals/et/ZorianB97
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dcterms:
bibliographicCitation
<
http://dblp.uni-trier.de/rec/bibtex/journals/et/ZorianB97
>
dc:
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<
https://dblp.l3s.de/d2r/resource/authors/Hakim_Bederr
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dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Yervant_Zorian
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foaf:
homepage
<
http://dx.doi.org/doi.org%2F10.1023%2FA%3A1008226715929
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dc:
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DBLP journals/et/ZorianB97
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dc:
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DOI doi.org%2F10.1023%2FA%3A1008226715929
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dcterms:
issued
1997
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An Effective Multi-Chip BIST Scheme.
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foaf:
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<
https://dblp.l3s.de/d2r/resource/authors/Yervant_Zorian
>
swrc:
number
1-2
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swrc:
pages
87-95
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rdfs:
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rdfs:
seeAlso
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dc:
subject
MCM testing; built-in self-test; DFT
(xsd:string)
dc:
title
An Effective Multi-Chip BIST Scheme.
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