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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/journals/fgcs/AmmendolaBFGGCL15>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Alessandro_Lonardo>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Andrea_Biagioni>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Davide_Rossetti>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Francesca_Lo_Cicero>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Francesco_Simula>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Gert_Goossens>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Laura_Tosoratto>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Ottorino_Frezza>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Pier_Stanislao_Paolucci>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Piero_Vicini>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Roberto_Ammendola>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Werner_Geurts>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1016%2Fj.future.2014.12.012>
foaf:homepage <https://doi.org/10.1016/j.future.2014.12.012>
dc:identifier DBLP journals/fgcs/AmmendolaBFGGCL15 (xsd:string)
dc:identifier DOI doi.org%2F10.1016%2Fj.future.2014.12.012 (xsd:string)
dcterms:issued 2015 (xsd:gYear)
swrc:journal <https://dblp.l3s.de/d2r/resource/journals/fgcs>
rdfs:label ASIP acceleration for virtual-to-physical address translation on RDMA-enabled FPGA-based network interfaces. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Alessandro_Lonardo>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Andrea_Biagioni>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Davide_Rossetti>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Francesca_Lo_Cicero>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Francesco_Simula>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Gert_Goossens>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Laura_Tosoratto>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Ottorino_Frezza>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Pier_Stanislao_Paolucci>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Piero_Vicini>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Roberto_Ammendola>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Werner_Geurts>
swrc:pages 109-118 (xsd:string)
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/journals/fgcs/AmmendolaBFGGCL15/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/journals/fgcs/AmmendolaBFGGCL15>
rdfs:seeAlso <http://dblp.uni-trier.de/db/journals/fgcs/fgcs53.html#AmmendolaBFGGCL15>
rdfs:seeAlso <https://doi.org/10.1016/j.future.2014.12.012>
dc:title ASIP acceleration for virtual-to-physical address translation on RDMA-enabled FPGA-based network interfaces. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:Article
rdf:type foaf:Document
swrc:volume 53 (xsd:string)