AI hardware acceleration with analog memory: Microarchitectures for low energy at high speed.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/journals/ibmrd/ChangNLFHMTACB19
Home
|
Example Publications
Property
Value
dcterms:
bibliographicCitation
<
http://dblp.uni-trier.de/rec/bibtex/journals/ibmrd/ChangNLFHMTACB19
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/An_Chen
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Charles_Mackin
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Geoffrey_W._Burr
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Hsinyu_Tsai
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Hung-Yang_Chang
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Kohji_Hosokawa
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Nathan_C._P._Farinha
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Pritish_Narayanan
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Scott_C._Lewis
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Stefano_Ambrogio
>
foaf:
homepage
<
http://dx.doi.org/doi.org%2F10.1147%2FJRD.2019.2934050
>
foaf:
homepage
<
https://doi.org/10.1147/JRD.2019.2934050
>
dc:
identifier
DBLP journals/ibmrd/ChangNLFHMTACB19
(xsd:string)
dc:
identifier
DOI doi.org%2F10.1147%2FJRD.2019.2934050
(xsd:string)
dcterms:
issued
2019
(xsd:gYear)
swrc:
journal
<
https://dblp.l3s.de/d2r/resource/journals/ibmrd
>
rdfs:
label
AI hardware acceleration with analog memory: Microarchitectures for low energy at high speed.
(xsd:string)
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/An_Chen
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Charles_Mackin
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Geoffrey_W._Burr
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Hsinyu_Tsai
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Hung-Yang_Chang
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Kohji_Hosokawa
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Nathan_C._P._Farinha
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Pritish_Narayanan
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Scott_C._Lewis
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Stefano_Ambrogio
>
swrc:
number
6
(xsd:string)
swrc:
pages
8:1-8:14
(xsd:string)
owl:
sameAs
<
http://bibsonomy.org/uri/bibtexkey/journals/ibmrd/ChangNLFHMTACB19/dblp
>
owl:
sameAs
<
http://dblp.rkbexplorer.com/id/journals/ibmrd/ChangNLFHMTACB19
>
rdfs:
seeAlso
<
http://dblp.uni-trier.de/db/journals/ibmrd/ibmrd63.html#ChangNLFHMTACB19
>
rdfs:
seeAlso
<
https://doi.org/10.1147/JRD.2019.2934050
>
dc:
title
AI hardware acceleration with analog memory: Microarchitectures for low energy at high speed.
(xsd:string)
dc:
type
<
http://purl.org/dc/dcmitype/Text
>
rdf:
type
swrc:Article
rdf:
type
foaf:Document
swrc:
volume
63
(xsd:string)