[RDF data]
Home | Example Publications
PropertyValue
dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/journals/ieiceee/AssaadA11>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Maher_Assaad>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Mohammed_H._Alser>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1587%2Felex.8.2017>
foaf:homepage <https://doi.org/10.1587/elex.8.2017>
dc:identifier DBLP journals/ieiceee/AssaadA11 (xsd:string)
dc:identifier DOI doi.org%2F10.1587%2Felex.8.2017 (xsd:string)
dcterms:issued 2011 (xsd:gYear)
swrc:journal <https://dblp.l3s.de/d2r/resource/journals/ieiceee>
rdfs:label An FPGA-based design and implementation of an all-digital serializer for inter module communication in SoC. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Maher_Assaad>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Mohammed_H._Alser>
swrc:number 23 (xsd:string)
swrc:pages 2017-2023 (xsd:string)
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/journals/ieiceee/AssaadA11/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/journals/ieiceee/AssaadA11>
rdfs:seeAlso <http://dblp.uni-trier.de/db/journals/ieiceee/ieiceee8.html#AssaadA11>
rdfs:seeAlso <https://doi.org/10.1587/elex.8.2017>
dc:title An FPGA-based design and implementation of an all-digital serializer for inter module communication in SoC. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:Article
rdf:type foaf:Document
swrc:volume 8 (xsd:string)