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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/journals/ieiceee/MasuINSA09>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Kazuya_Masu>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Noboru_Ishihara>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Noriaki_Nakayama>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Shuhei_Amakawa>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Takashi_Sato>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1587%2Felex.6.703>
foaf:homepage <https://doi.org/10.1587/elex.6.703>
dc:identifier DBLP journals/ieiceee/MasuINSA09 (xsd:string)
dc:identifier DOI doi.org%2F10.1587%2Felex.6.703 (xsd:string)
dcterms:issued 2009 (xsd:gYear)
swrc:journal <https://dblp.l3s.de/d2r/resource/journals/ieiceee>
rdfs:label Physical design challenges to nano-CMOS circuits. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Kazuya_Masu>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Noboru_Ishihara>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Noriaki_Nakayama>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Shuhei_Amakawa>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Takashi_Sato>
swrc:number 11 (xsd:string)
swrc:pages 703-720 (xsd:string)
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/journals/ieiceee/MasuINSA09/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/journals/ieiceee/MasuINSA09>
rdfs:seeAlso <http://dblp.uni-trier.de/db/journals/ieiceee/ieiceee6.html#MasuINSA09>
rdfs:seeAlso <https://doi.org/10.1587/elex.6.703>
dc:title Physical design challenges to nano-CMOS circuits. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:Article
rdf:type foaf:Document
swrc:volume 6 (xsd:string)