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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/journals/ieiceee/PanSZLHZ22>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Boxiao_Liu>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Chengxian_Pan>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Chunqi_Shi>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Guoliang_Zhao>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Leilei_Huang>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Runxi_Zhang>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1587%2Felex.19.20220432>
foaf:homepage <https://doi.org/10.1587/elex.19.20220432>
dc:identifier DBLP journals/ieiceee/PanSZLHZ22 (xsd:string)
dc:identifier DOI doi.org%2F10.1587%2Felex.19.20220432 (xsd:string)
dcterms:issued 2022 (xsd:gYear)
swrc:journal <https://dblp.l3s.de/d2r/resource/journals/ieiceee>
rdfs:label A 21.3-24.5Gb/s low jitter PLL-based clock and data recovery circuit with cascode-coupled quadrature LC-VCO. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Boxiao_Liu>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Chengxian_Pan>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Chunqi_Shi>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Guoliang_Zhao>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Leilei_Huang>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Runxi_Zhang>
swrc:number 24 (xsd:string)
swrc:pages 20220432 (xsd:string)
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/journals/ieiceee/PanSZLHZ22/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/journals/ieiceee/PanSZLHZ22>
rdfs:seeAlso <http://dblp.uni-trier.de/db/journals/ieiceee/ieiceee19.html#PanSZLHZ22>
rdfs:seeAlso <https://doi.org/10.1587/elex.19.20220432>
dc:title A 21.3-24.5Gb/s low jitter PLL-based clock and data recovery circuit with cascode-coupled quadrature LC-VCO. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:Article
rdf:type foaf:Document
swrc:volume 19 (xsd:string)