A low-overhead in-situ timing-error prediction technique with wide-voltage-range transition-detector for variation-tolerant digital circuits. | D2R Server publishing the DBLP Bibliography Database, hosted at L3S Research Center

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dcterms:bibliographicCitation	<http://dblp.uni-trier.de/rec/bibtex/journals/ieiceee/WangZLYLQ23>
dc:creator	<https://dblp.l3s.de/d2r/resource/authors/Huidong_Zhao>
dc:creator	<https://dblp.l3s.de/d2r/resource/authors/Jialu_Yin>
dc:creator	<https://dblp.l3s.de/d2r/resource/authors/Jiliang_Liu>
dc:creator	<https://dblp.l3s.de/d2r/resource/authors/Kangning_Wang>
dc:creator	<https://dblp.l3s.de/d2r/resource/authors/Shushan_Qiao>
dc:creator	<https://dblp.l3s.de/d2r/resource/authors/Zhi_Li>
foaf:homepage	<http://dx.doi.org/doi.org%2F10.1587%2Felex.20.20230145>
foaf:homepage	<https://doi.org/10.1587/elex.20.20230145>
dc:identifier	DBLP journals/ieiceee/WangZLYLQ23 (xsd:string)
dc:identifier	DOI doi.org%2F10.1587%2Felex.20.20230145 (xsd:string)
dcterms:issued	2023 (xsd:gYear)
swrc:journal	<https://dblp.l3s.de/d2r/resource/journals/ieiceee>
rdfs:label	A low-overhead in-situ timing-error prediction technique with wide-voltage-range transition-detector for variation-tolerant digital circuits. (xsd:string)
foaf:maker	<https://dblp.l3s.de/d2r/resource/authors/Huidong_Zhao>
foaf:maker	<https://dblp.l3s.de/d2r/resource/authors/Jialu_Yin>
foaf:maker	<https://dblp.l3s.de/d2r/resource/authors/Jiliang_Liu>
foaf:maker	<https://dblp.l3s.de/d2r/resource/authors/Kangning_Wang>
foaf:maker	<https://dblp.l3s.de/d2r/resource/authors/Shushan_Qiao>
foaf:maker	<https://dblp.l3s.de/d2r/resource/authors/Zhi_Li>
swrc:number	11 (xsd:string)
swrc:pages	20230145 (xsd:string)
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rdfs:seeAlso	<https://doi.org/10.1587/elex.20.20230145>
dc:title	A low-overhead in-situ timing-error prediction technique with wide-voltage-range transition-detector for variation-tolerant digital circuits. (xsd:string)
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