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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/journals/ieicet/ChienLSTC05>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Ching-Ling_Cheng>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Feng-Tso_Chien>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Kou-Way_Tu>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Ming-Hung_Lai>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Shih-Tzung_Su>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1093%2Fietele%2Fe88-c.4.694>
foaf:homepage <https://doi.org/10.1093/ietele/e88-c.4.694>
dc:identifier DBLP journals/ieicet/ChienLSTC05 (xsd:string)
dc:identifier DOI doi.org%2F10.1093%2Fietele%2Fe88-c.4.694 (xsd:string)
dcterms:issued 2005 (xsd:gYear)
swrc:journal <https://dblp.l3s.de/d2r/resource/journals/ieicet>
rdfs:label High Ruggedness Power MOSFET Design by a Self-Align p+ Process. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Ching-Ling_Cheng>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Feng-Tso_Chien>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Kou-Way_Tu>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Ming-Hung_Lai>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Shih-Tzung_Su>
swrc:number 4 (xsd:string)
swrc:pages 694-698 (xsd:string)
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/journals/ieicet/ChienLSTC05/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/journals/ieicet/ChienLSTC05>
rdfs:seeAlso <http://dblp.uni-trier.de/db/journals/ieicet/ieicet88c.html#ChienLSTC05>
rdfs:seeAlso <https://doi.org/10.1093/ietele/e88-c.4.694>
dc:title High Ruggedness Power MOSFET Design by a Self-Align p+ Process. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:Article
rdf:type foaf:Document
swrc:volume 88-C (xsd:string)