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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/journals/ieicet/HagiwaraYTMS10>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Kazuya_Masu>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Koh_Yamanaga>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Ryo_Takahashi>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Shiho_Hagiwara>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Takashi_Sato>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1587%2Ftransfun.E93.A.2409>
foaf:homepage <https://doi.org/10.1587/transfun.E93.A.2409>
dc:identifier DBLP journals/ieicet/HagiwaraYTMS10 (xsd:string)
dc:identifier DOI doi.org%2F10.1587%2Ftransfun.E93.A.2409 (xsd:string)
dcterms:issued 2010 (xsd:gYear)
swrc:journal <https://dblp.l3s.de/d2r/resource/journals/ieicet>
rdfs:label Linear Time Calculation of On-Chip Power Distribution Network Capacitance Considering State-Dependence. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Kazuya_Masu>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Koh_Yamanaga>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Ryo_Takahashi>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Shiho_Hagiwara>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Takashi_Sato>
swrc:number 12 (xsd:string)
swrc:pages 2409-2416 (xsd:string)
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/journals/ieicet/HagiwaraYTMS10/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/journals/ieicet/HagiwaraYTMS10>
rdfs:seeAlso <http://dblp.uni-trier.de/db/journals/ieicet/ieicet93a.html#HagiwaraYTMS10>
rdfs:seeAlso <https://doi.org/10.1587/transfun.E93.A.2409>
dc:title Linear Time Calculation of On-Chip Power Distribution Network Capacitance Considering State-Dependence. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:Article
rdf:type foaf:Document
swrc:volume 93-A (xsd:string)