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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/journals/ieicet/JohguchiYT14>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Kasuaki_Yoshioka>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Ken_Takeuchi>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Koh_Johguchi>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1587%2Ftransele.E97.C.351>
foaf:homepage <https://doi.org/10.1587/transele.E97.C.351>
dc:identifier DBLP journals/ieicet/JohguchiYT14 (xsd:string)
dc:identifier DOI doi.org%2F10.1587%2Ftransele.E97.C.351 (xsd:string)
dcterms:issued 2014 (xsd:gYear)
swrc:journal <https://dblp.l3s.de/d2r/resource/journals/ieicet>
rdfs:label NAND Phase Change Memory with Block Erase Architecture and Pass-Transistor Design Requirements for Write and Disturbance. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Kasuaki_Yoshioka>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Ken_Takeuchi>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Koh_Johguchi>
swrc:number 4 (xsd:string)
swrc:pages 351-359 (xsd:string)
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/journals/ieicet/JohguchiYT14/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/journals/ieicet/JohguchiYT14>
rdfs:seeAlso <http://dblp.uni-trier.de/db/journals/ieicet/ieicet97c.html#JohguchiYT14>
rdfs:seeAlso <https://doi.org/10.1587/transele.E97.C.351>
dc:title NAND Phase Change Memory with Block Erase Architecture and Pass-Transistor Design Requirements for Write and Disturbance. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:Article
rdf:type foaf:Document
swrc:volume 97-C (xsd:string)