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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/journals/ieicet/KumakiKIKM07>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Hans_J%E2%88%9A%C4%BErgen_Mattausch>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Masakatsu_Ishizaki>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Takeshi_Kumaki>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Tetsushi_Koide>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Yutaka_Kono>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1093%2Fietisy%2Fe90-1.1.346>
foaf:homepage <https://doi.org/10.1093/ietisy/e90-1.1.346>
dc:identifier DBLP journals/ieicet/KumakiKIKM07 (xsd:string)
dc:identifier DOI doi.org%2F10.1093%2Fietisy%2Fe90-1.1.346 (xsd:string)
dcterms:issued 2007 (xsd:gYear)
swrc:journal <https://dblp.l3s.de/d2r/resource/journals/ieicet>
rdfs:label Scalable FPGA/ASIC Implementation Architecture for Parallel Table-Lookup-Coding Using Multi-Ported Content Addressable Memory. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Hans_J%E2%88%9A%C4%BErgen_Mattausch>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Masakatsu_Ishizaki>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Takeshi_Kumaki>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Tetsushi_Koide>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Yutaka_Kono>
swrc:number 1 (xsd:string)
swrc:pages 346-354 (xsd:string)
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/journals/ieicet/KumakiKIKM07/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/journals/ieicet/KumakiKIKM07>
rdfs:seeAlso <http://dblp.uni-trier.de/db/journals/ieicet/ieicet90d.html#KumakiKIKM07>
rdfs:seeAlso <https://doi.org/10.1093/ietisy/e90-1.1.346>
dc:title Scalable FPGA/ASIC Implementation Architecture for Parallel Table-Lookup-Coding Using Multi-Ported Content Addressable Memory. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:Article
rdf:type foaf:Document
swrc:volume 90-D (xsd:string)