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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/journals/ieicet/LiDW12>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Ce_Li_0006>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Takahiro_Watanabe>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Yiping_Dong>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1587%2Ftransinf.E95.D.314>
foaf:homepage <https://doi.org/10.1587/transinf.E95.D.314>
dc:identifier DBLP journals/ieicet/LiDW12 (xsd:string)
dc:identifier DOI doi.org%2F10.1587%2Ftransinf.E95.D.314 (xsd:string)
dcterms:issued 2012 (xsd:gYear)
swrc:journal <https://dblp.l3s.de/d2r/resource/journals/ieicet>
rdfs:label Region-Oriented Placement Algorithm for Coarse-Grained Power-Gating FPGA Architecture. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Ce_Li_0006>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Takahiro_Watanabe>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Yiping_Dong>
swrc:number 2 (xsd:string)
swrc:pages 314-323 (xsd:string)
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/journals/ieicet/LiDW12/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/journals/ieicet/LiDW12>
rdfs:seeAlso <http://dblp.uni-trier.de/db/journals/ieicet/ieicet95d.html#LiDW12>
rdfs:seeAlso <https://doi.org/10.1587/transinf.E95.D.314>
dc:title Region-Oriented Placement Algorithm for Coarse-Grained Power-Gating FPGA Architecture. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:Article
rdf:type foaf:Document
swrc:volume 95-D (xsd:string)