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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/journals/ieicet/NakamuraYY05>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Ko_Yoshikawa>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Takeshi_Yoshimura>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Yuichi_Nakamura_0002>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1093%2Fietfec%2Fe88-a.12.3351>
foaf:homepage <https://doi.org/10.1093/ietfec/e88-a.12.3351>
dc:identifier DBLP journals/ieicet/NakamuraYY05 (xsd:string)
dc:identifier DOI doi.org%2F10.1093%2Fietfec%2Fe88-a.12.3351 (xsd:string)
dcterms:issued 2005 (xsd:gYear)
swrc:journal <https://dblp.l3s.de/d2r/resource/journals/ieicet>
rdfs:label An Engineering Change Orders Design Method Based on Patchwork-Like Partitioning for High Performance LSIs. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Ko_Yoshikawa>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Takeshi_Yoshimura>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Yuichi_Nakamura_0002>
swrc:number 12 (xsd:string)
swrc:pages 3351-3357 (xsd:string)
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/journals/ieicet/NakamuraYY05/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/journals/ieicet/NakamuraYY05>
rdfs:seeAlso <http://dblp.uni-trier.de/db/journals/ieicet/ieicet88a.html#NakamuraYY05>
rdfs:seeAlso <https://doi.org/10.1093/ietfec/e88-a.12.3351>
dc:title An Engineering Change Orders Design Method Based on Patchwork-Like Partitioning for High Performance LSIs. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:Article
rdf:type foaf:Document
swrc:volume 88-A (xsd:string)