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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/journals/ieicet/TakagiITTT11>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Kazuyoshi_Takagi>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Masamitsu_Tanaka>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Naofumi_Takagi>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Shota_Takeshima>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Yuki_Ito>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1587%2Ftransele.E94.C.288>
foaf:homepage <https://doi.org/10.1587/transele.E94.C.288>
dc:identifier DBLP journals/ieicet/TakagiITTT11 (xsd:string)
dc:identifier DOI doi.org%2F10.1587%2Ftransele.E94.C.288 (xsd:string)
dcterms:issued 2011 (xsd:gYear)
swrc:journal <https://dblp.l3s.de/d2r/resource/journals/ieicet>
rdfs:label Layout-Driven Skewed Clock Tree Synthesis for Superconducting SFQ Circuits. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Kazuyoshi_Takagi>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Masamitsu_Tanaka>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Naofumi_Takagi>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Shota_Takeshima>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Yuki_Ito>
swrc:number 3 (xsd:string)
swrc:pages 288-295 (xsd:string)
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/journals/ieicet/TakagiITTT11/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/journals/ieicet/TakagiITTT11>
rdfs:seeAlso <http://dblp.uni-trier.de/db/journals/ieicet/ieicet94c.html#TakagiITTT11>
rdfs:seeAlso <https://doi.org/10.1587/transele.E94.C.288>
dc:title Layout-Driven Skewed Clock Tree Synthesis for Superconducting SFQ Circuits. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:Article
rdf:type foaf:Document
swrc:volume 94-C (xsd:string)