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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/journals/ieicet/YamamotoSKNSAKY07>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Hirohito_Kikukawa>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Hiroyuki_Yamauchi>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Masanori_Shirahama>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Ryuji_Nishihara>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Shinichi_Sumi>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Toshiaki_Kawasaki>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Yasue_Yamamoto>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Yasuhiro_Agata>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1093%2Fietele%2Fe90-c.5.1129>
foaf:homepage <https://doi.org/10.1093/ietele/e90-c.5.1129>
dc:identifier DBLP journals/ieicet/YamamotoSKNSAKY07 (xsd:string)
dc:identifier DOI doi.org%2F10.1093%2Fietele%2Fe90-c.5.1129 (xsd:string)
dcterms:issued 2007 (xsd:gYear)
swrc:journal <https://dblp.l3s.de/d2r/resource/journals/ieicet>
rdfs:label A PND (PMOS-NMOS-Depletion MOS) Type Single Poly Gate Non-Volatile Memory Cell Design with a Differential Cell Architecture in a Pure CMOS Logic Process for a System LSI. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Hirohito_Kikukawa>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Hiroyuki_Yamauchi>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Masanori_Shirahama>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Ryuji_Nishihara>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Shinichi_Sumi>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Toshiaki_Kawasaki>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Yasue_Yamamoto>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Yasuhiro_Agata>
swrc:number 5 (xsd:string)
swrc:pages 1129-1137 (xsd:string)
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/journals/ieicet/YamamotoSKNSAKY07/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/journals/ieicet/YamamotoSKNSAKY07>
rdfs:seeAlso <http://dblp.uni-trier.de/db/journals/ieicet/ieicet90c.html#YamamotoSKNSAKY07>
rdfs:seeAlso <https://doi.org/10.1093/ietele/e90-c.5.1129>
dc:title A PND (PMOS-NMOS-Depletion MOS) Type Single Poly Gate Non-Volatile Memory Cell Design with a Differential Cell Architecture in a Pure CMOS Logic Process for a System LSI. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:Article
rdf:type foaf:Document
swrc:volume 90-C (xsd:string)