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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/journals/ieicet/ZhaoIAIKS13>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Kazuki_Inoue>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Masahiro_Iida>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Morihiro_Kuga>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Motoki_Amagasaki>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Qian_Zhao_0001>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Toshinori_Sueyoshi>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1587%2Ftransinf.E96.D.1602>
foaf:homepage <https://doi.org/10.1587/transinf.E96.D.1602>
dc:identifier DBLP journals/ieicet/ZhaoIAIKS13 (xsd:string)
dc:identifier DOI doi.org%2F10.1587%2Ftransinf.E96.D.1602 (xsd:string)
dcterms:issued 2013 (xsd:gYear)
swrc:journal <https://dblp.l3s.de/d2r/resource/journals/ieicet>
rdfs:label FPGA Design Framework Combined with Commercial VLSI CAD. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Kazuki_Inoue>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Masahiro_Iida>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Morihiro_Kuga>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Motoki_Amagasaki>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Qian_Zhao_0001>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Toshinori_Sueyoshi>
swrc:number 8 (xsd:string)
swrc:pages 1602-1612 (xsd:string)
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/journals/ieicet/ZhaoIAIKS13/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/journals/ieicet/ZhaoIAIKS13>
rdfs:seeAlso <http://dblp.uni-trier.de/db/journals/ieicet/ieicet96d.html#ZhaoIAIKS13>
rdfs:seeAlso <https://doi.org/10.1587/transinf.E96.D.1602>
dc:title FPGA Design Framework Combined with Commercial VLSI CAD. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:Article
rdf:type foaf:Document
swrc:volume 96-D (xsd:string)