Datapath-Layout-Driven Design for Low-Power Standard-Cell LSI Implementation.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/journals/ieiceta/KakimotoOT02
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2002
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Datapath-Layout-Driven Design for Low-Power Standard-Cell LSI Implementation.
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Datapath-Layout-Driven Design for Low-Power Standard-Cell LSI Implementation.
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