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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/journals/iet-cds/RoyMDSB19>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Arka_Dutta>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Chandan_Kumar_Sarkar>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Chayanika_Bose>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Sagar_Mukherjee>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Swarnil_Roy>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1049%2Fiet-cds.2018.5199>
foaf:homepage <https://doi.org/10.1049/iet-cds.2018.5199>
dc:identifier DBLP journals/iet-cds/RoyMDSB19 (xsd:string)
dc:identifier DOI doi.org%2F10.1049%2Fiet-cds.2018.5199 (xsd:string)
dcterms:issued 2019 (xsd:gYear)
swrc:journal <https://dblp.l3s.de/d2r/resource/journals/iet-cds>
rdfs:label Circuit performance analysis of graded doping of channel of DGMOS with high-k gate stack for analogue and digital application. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Arka_Dutta>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Chandan_Kumar_Sarkar>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Chayanika_Bose>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Sagar_Mukherjee>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Swarnil_Roy>
swrc:number 3 (xsd:string)
swrc:pages 337-343 (xsd:string)
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/journals/iet-cds/RoyMDSB19/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/journals/iet-cds/RoyMDSB19>
rdfs:seeAlso <http://dblp.uni-trier.de/db/journals/iet-cds/iet-cds13.html#RoyMDSB19>
rdfs:seeAlso <https://doi.org/10.1049/iet-cds.2018.5199>
dc:title Circuit performance analysis of graded doping of channel of DGMOS with high-k gate stack for analogue and digital application. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:Article
rdf:type foaf:Document
swrc:volume 13 (xsd:string)