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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/journals/iet-cdt/GuptaC21>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Mangal_Deep_Gupta>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Rajeev_K._Chauhan>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1049%2Fcdt2.12027>
foaf:homepage <https://doi.org/10.1049/cdt2.12027>
dc:identifier DBLP journals/iet-cdt/GuptaC21 (xsd:string)
dc:identifier DOI doi.org%2F10.1049%2Fcdt2.12027 (xsd:string)
dcterms:issued 2021 (xsd:gYear)
swrc:journal <https://dblp.l3s.de/d2r/resource/journals/iet-cdt>
rdfs:label Coupled variable-input LCG and clock divider-based large period pseudo-random bit generator on FPGA. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Mangal_Deep_Gupta>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Rajeev_K._Chauhan>
swrc:number 5 (xsd:string)
swrc:pages 349-361 (xsd:string)
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/journals/iet-cdt/GuptaC21/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/journals/iet-cdt/GuptaC21>
rdfs:seeAlso <http://dblp.uni-trier.de/db/journals/iet-cdt/iet-cdt15.html#GuptaC21>
rdfs:seeAlso <https://doi.org/10.1049/cdt2.12027>
dc:title Coupled variable-input LCG and clock divider-based large period pseudo-random bit generator on FPGA. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:Article
rdf:type foaf:Document
swrc:volume 15 (xsd:string)