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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/journals/iet-cdt/LiuHLL17>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Cheng-Yu_Han>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/James_Chien-Mo_Li>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Shih-Ya_Lin>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Yu-Cheng_Liu>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1049%2Fiet-cdt.2016.0032>
foaf:homepage <https://doi.org/10.1049/iet-cdt.2016.0032>
dc:identifier DBLP journals/iet-cdt/LiuHLL17 (xsd:string)
dc:identifier DOI doi.org%2F10.1049%2Fiet-cdt.2016.0032 (xsd:string)
dcterms:issued 2017 (xsd:gYear)
swrc:journal <https://dblp.l3s.de/d2r/resource/journals/iet-cdt>
rdfs:label PSN-aware circuit test timing prediction using machine learning. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Cheng-Yu_Han>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/James_Chien-Mo_Li>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Shih-Ya_Lin>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Yu-Cheng_Liu>
swrc:number 2 (xsd:string)
swrc:pages 60-67 (xsd:string)
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/journals/iet-cdt/LiuHLL17/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/journals/iet-cdt/LiuHLL17>
rdfs:seeAlso <http://dblp.uni-trier.de/db/journals/iet-cdt/iet-cdt11.html#LiuHLL17>
rdfs:seeAlso <https://doi.org/10.1049/iet-cdt.2016.0032>
dc:title PSN-aware circuit test timing prediction using machine learning. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:Article
rdf:type foaf:Document
swrc:volume 11 (xsd:string)