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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/journals/ijcta/HoseiniLK20>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Chun_Ki_Kwon>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Kye-Shin_Lee>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Zaniar_Hoseini>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1002%2Fcta.2842>
foaf:homepage <https://doi.org/10.1002/cta.2842>
dc:identifier DBLP journals/ijcta/HoseiniLK20 (xsd:string)
dc:identifier DOI doi.org%2F10.1002%2Fcta.2842 (xsd:string)
dcterms:issued 2020 (xsd:gYear)
swrc:journal <https://dblp.l3s.de/d2r/resource/journals/ijcta>
rdfs:label Design of an 8-bit time-mode cyclic ADC based on macro modeling. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Chun_Ki_Kwon>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Kye-Shin_Lee>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Zaniar_Hoseini>
swrc:number 11 (xsd:string)
swrc:pages 1839-1852 (xsd:string)
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/journals/ijcta/HoseiniLK20/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/journals/ijcta/HoseiniLK20>
rdfs:seeAlso <http://dblp.uni-trier.de/db/journals/ijcta/ijcta48.html#HoseiniLK20>
rdfs:seeAlso <https://doi.org/10.1002/cta.2842>
dc:title Design of an 8-bit time-mode cyclic ADC based on macro modeling. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:Article
rdf:type foaf:Document
swrc:volume 48 (xsd:string)