A low jitter and fast locking all digital phase locked loop with flash based time to digital converter and gain calibrated voltage controlled oscillator. | D2R Server publishing the DBLP Bibliography Database, hosted at L3S Research Center

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dcterms:bibliographicCitation	<http://dblp.uni-trier.de/rec/bibtex/journals/ijcta/SahaniSA22>
dc:creator	<https://dblp.l3s.de/d2r/resource/authors/Alpana_Agarwal>
dc:creator	<https://dblp.l3s.de/d2r/resource/authors/Anil_Singh>
dc:creator	<https://dblp.l3s.de/d2r/resource/authors/Jagdeep_Kaur_Sahani>
foaf:homepage	<http://dx.doi.org/doi.org%2F10.1002%2Fcta.3292>
foaf:homepage	<https://doi.org/10.1002/cta.3292>
dc:identifier	DBLP journals/ijcta/SahaniSA22 (xsd:string)
dc:identifier	DOI doi.org%2F10.1002%2Fcta.3292 (xsd:string)
dcterms:issued	2022 (xsd:gYear)
swrc:journal	<https://dblp.l3s.de/d2r/resource/journals/ijcta>
rdfs:label	A low jitter and fast locking all digital phase locked loop with flash based time to digital converter and gain calibrated voltage controlled oscillator. (xsd:string)
foaf:maker	<https://dblp.l3s.de/d2r/resource/authors/Alpana_Agarwal>
foaf:maker	<https://dblp.l3s.de/d2r/resource/authors/Anil_Singh>
foaf:maker	<https://dblp.l3s.de/d2r/resource/authors/Jagdeep_Kaur_Sahani>
swrc:number	8 (xsd:string)
swrc:pages	2900-2912 (xsd:string)
owl:sameAs	<http://bibsonomy.org/uri/bibtexkey/journals/ijcta/SahaniSA22/dblp>
owl:sameAs	<http://dblp.rkbexplorer.com/id/journals/ijcta/SahaniSA22>
rdfs:seeAlso	<http://dblp.uni-trier.de/db/journals/ijcta/ijcta50.html#SahaniSA22>
rdfs:seeAlso	<https://doi.org/10.1002/cta.3292>
dc:title	A low jitter and fast locking all digital phase locked loop with flash based time to digital converter and gain calibrated voltage controlled oscillator. (xsd:string)
dc:type	<http://purl.org/dc/dcmitype/Text>
rdf:type	swrc:Article
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swrc:volume	50 (xsd:string)