Parametric yield optimization of CMOS analogue circuits by quadratic statistical circuit performance models.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/journals/ijcta/YuKSW91
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1991
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Parametric yield optimization of CMOS analogue circuits by quadratic statistical circuit performance models.
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Parametric yield optimization of CMOS analogue circuits by quadratic statistical circuit performance models.
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