Targeting reconfigurable FPGA based SoCs using the UML MARTE profile: from high abstraction levels to code generation.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/journals/ijes/QuadriYGRMD10
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Targeting reconfigurable FPGA based SoCs using the UML MARTE profile: from high abstraction levels to code generation.
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Targeting reconfigurable FPGA based SoCs using the UML MARTE profile: from high abstraction levels to code generation.
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