A Flexible Framework for Communication Evaluation in SoC Design.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/journals/ijpp/KallaHH08
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http://dblp.uni-trier.de/rec/bibtex/journals/ijpp/KallaHH08
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https://dblp.l3s.de/d2r/resource/authors/Praveen_Kalla
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https://dblp.l3s.de/d2r/resource/authors/Xiaobo_Sharon_Hu
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http://dx.doi.org/doi.org%2F10.1007%2Fs10766-008-0081-6
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DBLP journals/ijpp/KallaHH08
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DOI doi.org%2F10.1007%2Fs10766-008-0081-6
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dcterms:
issued
2008
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https://dblp.l3s.de/d2r/resource/journals/ijpp
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A Flexible Framework for Communication Evaluation in SoC Design.
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foaf:
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https://dblp.l3s.de/d2r/resource/authors/Xiaobo_Sharon_Hu
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swrc:
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5
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swrc:
pages
457-477
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dc:
subject
Multiprocessor simulator; Interconnect simulator; Network on chip; Trace based simulation
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A Flexible Framework for Communication Evaluation in SoC Design.
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36
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