Extracting and Improving Microarchitecture Performance on Reconfigurable Architectures.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/journals/ijpp/PadmanabhanJSFKZCCFL05
Home
|
Example Publications
Property
Value
dcterms:
bibliographicCitation
<
http://dblp.uni-trier.de/rec/bibtex/journals/ijpp/PadmanabhanJSFKZCCFL05
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/David_V._Schuehler
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Huakai_Zhang
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Jason_E._Fritts
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/John_W._Lockwood
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Phillip_H._Jones
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Praveen_Krishnamurthy
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Roger_D._Chamberlain
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Ron_Cytron
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Scott_J._Friedman
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Shobana_Padmanabhan
>
foaf:
homepage
<
http://dx.doi.org/doi.org%2F10.1007%2Fs10766-005-3575-5
>
foaf:
homepage
<
https://doi.org/10.1007/s10766-005-3575-5
>
dc:
identifier
DBLP journals/ijpp/PadmanabhanJSFKZCCFL05
(xsd:string)
dc:
identifier
DOI doi.org%2F10.1007%2Fs10766-005-3575-5
(xsd:string)
dcterms:
issued
2005
(xsd:gYear)
swrc:
journal
<
https://dblp.l3s.de/d2r/resource/journals/ijpp
>
rdfs:
label
Extracting and Improving Microarchitecture Performance on Reconfigurable Architectures.
(xsd:string)
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/David_V._Schuehler
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Huakai_Zhang
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Jason_E._Fritts
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/John_W._Lockwood
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Phillip_H._Jones
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Praveen_Krishnamurthy
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Roger_D._Chamberlain
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Ron_Cytron
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Scott_J._Friedman
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Shobana_Padmanabhan
>
swrc:
number
2-3
(xsd:string)
swrc:
pages
115-136
(xsd:string)
owl:
sameAs
<
http://bibsonomy.org/uri/bibtexkey/journals/ijpp/PadmanabhanJSFKZCCFL05/dblp
>
owl:
sameAs
<
http://dblp.rkbexplorer.com/id/journals/ijpp/PadmanabhanJSFKZCCFL05
>
rdfs:
seeAlso
<
http://dblp.uni-trier.de/db/journals/ijpp/ijpp33.html#PadmanabhanJSFKZCCFL05
>
rdfs:
seeAlso
<
https://doi.org/10.1007/s10766-005-3575-5
>
dc:
subject
Reconfigurable; architecture; performance; cycle-accurate hardware profiling
(xsd:string)
dc:
title
Extracting and Improving Microarchitecture Performance on Reconfigurable Architectures.
(xsd:string)
dc:
type
<
http://purl.org/dc/dcmitype/Text
>
rdf:
type
swrc:Article
rdf:
type
foaf:Document
swrc:
volume
33
(xsd:string)