An Evaluation of an Integrated On-Chip/Off-Chip Network for High-Performance Reconfigurable Computing.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/journals/ijrc/SchmidtKGS12
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An Evaluation of an Integrated On-Chip/Off-Chip Network for High-Performance Reconfigurable Computing.
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An Evaluation of an Integrated On-Chip/Off-Chip Network for High-Performance Reconfigurable Computing.
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