A fast prototype for modeling IP cores using in SoC with UML Marte. | D2R Server publishing the DBLP Bibliography Database, hosted at L3S Research Center

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dc:creator	<https://dblp.l3s.de/d2r/resource/authors/Youcef_Benabdallah_Ahcene>
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dc:title	A fast prototype for modeling IP cores using in SoC with UML Marte. (xsd:string)
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