An improved KFDD based reversible circuit synthesis method. | D2R Server publishing the DBLP Bibliography Database, hosted at L3S Research Center

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dc:creator	<https://dblp.l3s.de/d2r/resource/authors/Dengli_Bu>
dc:creator	<https://dblp.l3s.de/d2r/resource/authors/Pengjun_Wang>
foaf:homepage	<http://dx.doi.org/doi.org%2F10.1016%2Fj.vlsi.2019.04.008>
foaf:homepage	<https://doi.org/10.1016/j.vlsi.2019.04.008>
dc:identifier	DBLP journals/integration/BuW19 (xsd:string)
dc:identifier	DOI doi.org%2F10.1016%2Fj.vlsi.2019.04.008 (xsd:string)
dcterms:issued	2019 (xsd:gYear)
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rdfs:label	An improved KFDD based reversible circuit synthesis method. (xsd:string)
foaf:maker	<https://dblp.l3s.de/d2r/resource/authors/Dengli_Bu>
foaf:maker	<https://dblp.l3s.de/d2r/resource/authors/Pengjun_Wang>
swrc:pages	251-265 (xsd:string)
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rdfs:seeAlso	<http://dblp.uni-trier.de/db/journals/integration/integration69.html#BuW19>
rdfs:seeAlso	<https://doi.org/10.1016/j.vlsi.2019.04.008>
dc:title	An improved KFDD based reversible circuit synthesis method. (xsd:string)
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rdf:type	swrc:Article
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swrc:volume	69 (xsd:string)