[RDF data]
Home | Example Publications
PropertyValue
dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/journals/integration/GarzonRCTFCL20>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Esteban_Garz%E2%88%9A%E2%89%A5n>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Felice_Crupi>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Giovanni_Finocchio>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Lionel_Trojman>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Marco_Lanuzza>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Mario_Carpentieri>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Raffaele_De_Rose>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1016%2Fj.vlsi.2020.01.002>
foaf:homepage <https://doi.org/10.1016/j.vlsi.2020.01.002>
dc:identifier DBLP journals/integration/GarzonRCTFCL20 (xsd:string)
dc:identifier DOI doi.org%2F10.1016%2Fj.vlsi.2020.01.002 (xsd:string)
dcterms:issued 2020 (xsd:gYear)
swrc:journal <https://dblp.l3s.de/d2r/resource/journals/integration>
rdfs:label Assessment of STT-MRAMs based on double-barrier MTJs for cache applications by means of a device-to-system level simulation framework. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Esteban_Garz%E2%88%9A%E2%89%A5n>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Felice_Crupi>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Giovanni_Finocchio>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Lionel_Trojman>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Marco_Lanuzza>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Mario_Carpentieri>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Raffaele_De_Rose>
swrc:pages 56-69 (xsd:string)
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/journals/integration/GarzonRCTFCL20/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/journals/integration/GarzonRCTFCL20>
rdfs:seeAlso <http://dblp.uni-trier.de/db/journals/integration/integration71.html#GarzonRCTFCL20>
rdfs:seeAlso <https://doi.org/10.1016/j.vlsi.2020.01.002>
dc:title Assessment of STT-MRAMs based on double-barrier MTJs for cache applications by means of a device-to-system level simulation framework. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:Article
rdf:type foaf:Document
swrc:volume 71 (xsd:string)