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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/journals/integration/PitaksanonkulTL89>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Anucha_Pitaksanonkul>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Chidchanok_Lursinsap>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Suchai_Thanawastien>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1016%2F0167-9260%2889%2990021-7>
foaf:homepage <https://doi.org/10.1016/0167-9260(89)90021-7>
dc:identifier DBLP journals/integration/PitaksanonkulTL89 (xsd:string)
dc:identifier DOI doi.org%2F10.1016%2F0167-9260%2889%2990021-7 (xsd:string)
dcterms:issued 1989 (xsd:gYear)
swrc:journal <https://dblp.l3s.de/d2r/resource/journals/integration>
rdfs:label Bisection trees and half-quad trees: Memory and time efficient data structures for VLSI layout editors. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Anucha_Pitaksanonkul>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Chidchanok_Lursinsap>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Suchai_Thanawastien>
swrc:number 3 (xsd:string)
swrc:pages 285-300 (xsd:string)
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/journals/integration/PitaksanonkulTL89/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/journals/integration/PitaksanonkulTL89>
rdfs:seeAlso <http://dblp.uni-trier.de/db/journals/integration/integration8.html#PitaksanonkulTL89>
rdfs:seeAlso <https://doi.org/10.1016/0167-9260(89)90021-7>
dc:title Bisection trees and half-quad trees: Memory and time efficient data structures for VLSI layout editors. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:Article
rdf:type foaf:Document
swrc:volume 8 (xsd:string)