CMOS full adder cells based on modified full swing restored complementary pass transistor logic for energy efficient high speed arithmetic applications. | D2R Server publishing the DBLP Bibliography Database, hosted at L3S Research Center

Property	Value
dcterms:bibliographicCitation	<http://dblp.uni-trier.de/rec/bibtex/journals/integration/SG24>
dc:creator	<https://dblp.l3s.de/d2r/resource/authors/Mahendran_G>
dc:creator	<https://dblp.l3s.de/d2r/resource/authors/Sriram_Sundar_S>
foaf:homepage	<http://dx.doi.org/doi.org%2F10.1016%2Fj.vlsi.2023.102132>
foaf:homepage	<https://doi.org/10.1016/j.vlsi.2023.102132>
dc:identifier	DBLP journals/integration/SG24 (xsd:string)
dc:identifier	DOI doi.org%2F10.1016%2Fj.vlsi.2023.102132 (xsd:string)
dcterms:issued	2024 (xsd:gYear)
swrc:journal	<https://dblp.l3s.de/d2r/resource/journals/integration>
rdfs:label	CMOS full adder cells based on modified full swing restored complementary pass transistor logic for energy efficient high speed arithmetic applications. (xsd:string)
foaf:maker	<https://dblp.l3s.de/d2r/resource/authors/Mahendran_G>
foaf:maker	<https://dblp.l3s.de/d2r/resource/authors/Sriram_Sundar_S>
swrc:month	March (xsd:string)
swrc:pages	102132 (xsd:string)
owl:sameAs	<http://bibsonomy.org/uri/bibtexkey/journals/integration/SG24/dblp>
owl:sameAs	<http://dblp.rkbexplorer.com/id/journals/integration/SG24>
rdfs:seeAlso	<http://dblp.uni-trier.de/db/journals/integration/integration95.html#SG24>
rdfs:seeAlso	<https://doi.org/10.1016/j.vlsi.2023.102132>
dc:title	CMOS full adder cells based on modified full swing restored complementary pass transistor logic for energy efficient high speed arithmetic applications. (xsd:string)
dc:type	<http://purl.org/dc/dcmitype/Text>
rdf:type	swrc:Article
rdf:type	foaf:Document
swrc:volume	95 (xsd:string)