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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/journals/integration/SchmidtZTZ17>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Bernhard_Schmidt>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Christian_Z%E2%88%9A%E2%88%82llner_0003>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Daniel_Ziener>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/J%E2%88%9A%C4%BErgen_Teich>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1016%2Fj.vlsi.2017.06.012>
foaf:homepage <https://doi.org/10.1016/j.vlsi.2017.06.012>
dc:identifier DBLP journals/integration/SchmidtZTZ17 (xsd:string)
dc:identifier DOI doi.org%2F10.1016%2Fj.vlsi.2017.06.012 (xsd:string)
dcterms:issued 2017 (xsd:gYear)
swrc:journal <https://dblp.l3s.de/d2r/resource/journals/integration>
rdfs:label Optimizing scrubbing by netlist analysis for FPGA configuration bit classification and floorplanning. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Bernhard_Schmidt>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Christian_Z%E2%88%9A%E2%88%82llner_0003>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Daniel_Ziener>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/J%E2%88%9A%C4%BErgen_Teich>
swrc:pages 98-108 (xsd:string)
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/journals/integration/SchmidtZTZ17/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/journals/integration/SchmidtZTZ17>
rdfs:seeAlso <http://dblp.uni-trier.de/db/journals/integration/integration59.html#SchmidtZTZ17>
rdfs:seeAlso <https://doi.org/10.1016/j.vlsi.2017.06.012>
dc:title Optimizing scrubbing by netlist analysis for FPGA configuration bit classification and floorplanning. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:Article
rdf:type foaf:Document
swrc:volume 59 (xsd:string)