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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/journals/integration/SerafySS14>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Ankur_Srivastava_0001>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Bing_Shi>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Caleb_Serafy>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1016%2Fj.vlsi.2013.11.004>
foaf:homepage <https://doi.org/10.1016/j.vlsi.2013.11.004>
dc:identifier DBLP journals/integration/SerafySS14 (xsd:string)
dc:identifier DOI doi.org%2F10.1016%2Fj.vlsi.2013.11.004 (xsd:string)
dcterms:issued 2014 (xsd:gYear)
swrc:journal <https://dblp.l3s.de/d2r/resource/journals/integration>
rdfs:label A geometric approach to chip-scale TSV shield placement for the reduction of TSV coupling in 3D-ICs. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Ankur_Srivastava_0001>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Bing_Shi>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Caleb_Serafy>
swrc:number 3 (xsd:string)
swrc:pages 307-317 (xsd:string)
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/journals/integration/SerafySS14/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/journals/integration/SerafySS14>
rdfs:seeAlso <http://dblp.uni-trier.de/db/journals/integration/integration47.html#SerafySS14>
rdfs:seeAlso <https://doi.org/10.1016/j.vlsi.2013.11.004>
dc:title A geometric approach to chip-scale TSV shield placement for the reduction of TSV coupling in 3D-ICs. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:Article
rdf:type foaf:Document
swrc:volume 47 (xsd:string)