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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/journals/integration/ShenCHHL08>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Bing_Lu>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Jiang_Hu>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Weixiang_Shen>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Xianlong_Hong>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Yici_Cai>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1016%2Fj.vlsi.2007.10.004>
foaf:homepage <https://doi.org/10.1016/j.vlsi.2007.10.004>
dc:identifier DBLP journals/integration/ShenCHHL08 (xsd:string)
dc:identifier DOI doi.org%2F10.1016%2Fj.vlsi.2007.10.004 (xsd:string)
dcterms:issued 2008 (xsd:gYear)
swrc:journal <https://dblp.l3s.de/d2r/resource/journals/integration>
rdfs:label Zero skew clock routing in X-architecture based on an improved greedy matching algorithm. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Bing_Lu>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Jiang_Hu>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Weixiang_Shen>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Xianlong_Hong>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Yici_Cai>
swrc:number 3 (xsd:string)
swrc:pages 426-438 (xsd:string)
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/journals/integration/ShenCHHL08/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/journals/integration/ShenCHHL08>
rdfs:seeAlso <http://dblp.uni-trier.de/db/journals/integration/integration41.html#ShenCHHL08>
rdfs:seeAlso <https://doi.org/10.1016/j.vlsi.2007.10.004>
dc:title Zero skew clock routing in X-architecture based on an improved greedy matching algorithm. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:Article
rdf:type foaf:Document
swrc:volume 41 (xsd:string)