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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/journals/integration/VohraTSD24>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Devarshi_Mrinal_Das>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Mahendra_Sakare>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Sahibia_Kaur_Vohra>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Sherin_A._Thomas>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1016%2Fj.vlsi.2023.102122>
foaf:homepage <https://doi.org/10.1016/j.vlsi.2023.102122>
dc:identifier DBLP journals/integration/VohraTSD24 (xsd:string)
dc:identifier DOI doi.org%2F10.1016%2Fj.vlsi.2023.102122 (xsd:string)
dcterms:issued 2024 (xsd:gYear)
swrc:journal <https://dblp.l3s.de/d2r/resource/journals/integration>
rdfs:label Circuit implementation of on-chip trainable spiking neural network using CMOS based memristive STDP synapses and LIF neurons. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Devarshi_Mrinal_Das>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Mahendra_Sakare>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Sahibia_Kaur_Vohra>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Sherin_A._Thomas>
swrc:month March (xsd:string)
swrc:pages 102122 (xsd:string)
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/journals/integration/VohraTSD24/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/journals/integration/VohraTSD24>
rdfs:seeAlso <http://dblp.uni-trier.de/db/journals/integration/integration95.html#VohraTSD24>
rdfs:seeAlso <https://doi.org/10.1016/j.vlsi.2023.102122>
dc:title Circuit implementation of on-chip trainable spiking neural network using CMOS based memristive STDP synapses and LIF neurons. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:Article
rdf:type foaf:Document
swrc:volume 95 (xsd:string)