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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/journals/integration/WangTLJSLLC23>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Chua-Chin_Wang>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Lean_Karlo_S._Tolentino>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Oliver_Lexter_July_A._Jose>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Pang-Yen_Lou>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Ralph_Gerard_B._Sangalang>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Shao-Wei_Lu>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Tzung-Je_Lee>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Wei-Chih_Chang>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1016%2Fj.vlsi.2023.02.004>
foaf:homepage <https://doi.org/10.1016/j.vlsi.2023.02.004>
dc:identifier DBLP journals/integration/WangTLJSLLC23 (xsd:string)
dc:identifier DOI doi.org%2F10.1016%2Fj.vlsi.2023.02.004 (xsd:string)
dcterms:issued 2023 (xsd:gYear)
swrc:journal <https://dblp.l3s.de/d2r/resource/journals/integration>
rdfs:label A 2xVDD digital output buffer with gate driving stability and non-overlapping signaling control for slew-rate auto-adjustment using 16-nm FinFET CMOS process. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Chua-Chin_Wang>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Lean_Karlo_S._Tolentino>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Oliver_Lexter_July_A._Jose>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Pang-Yen_Lou>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Ralph_Gerard_B._Sangalang>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Shao-Wei_Lu>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Tzung-Je_Lee>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Wei-Chih_Chang>
swrc:month May (xsd:string)
swrc:pages 245-260 (xsd:string)
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/journals/integration/WangTLJSLLC23/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/journals/integration/WangTLJSLLC23>
rdfs:seeAlso <http://dblp.uni-trier.de/db/journals/integration/integration90.html#WangTLJSLLC23>
rdfs:seeAlso <https://doi.org/10.1016/j.vlsi.2023.02.004>
dc:title A 2xVDD digital output buffer with gate driving stability and non-overlapping signaling control for slew-rate auto-adjustment using 16-nm FinFET CMOS process. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:Article
rdf:type foaf:Document
swrc:volume 90 (xsd:string)